Progress March I - NEO-B1 tracing (Patreon)
Content
It is known to mostly contain SRAM making the pair of line buffers needed to render sprites. Interestingly, unlike LSPC, this is a standard cell ASIC. There aren't any markings except for "87815", which probably doesn't mean anything outside of Fujitsu's offices.
I couldn't find documents on their standard cell products from that period so extracting the schematic is hurting my eyes a bit more. Luckily, density is lower, and there's a lot of flip-flops and multiplexers which are easy to figure out. Also SRAM takes a LOT of space even if there's only 9kbytes of it.
On the other side, LSPC2's simulation outputs recognizable pictures with a few striped glitches and an offset picture. I hope that knowing exaclty what B1 does will help fix those.