Progress February II - LSPC2 schematic (Patreon)

I just exported all the LSPC2 schematic sheets to png files and pushed them to Github: https://github.com/neogeodev/NeoGeoFPGA-sim/tree/master/LSPC2RE

As the Readme says: don't expect everything to be correct, I'm sharing this just to show progress. Some parts were thoroughly checked because they were causing simulation to give incorrect results, but most are not !

Speaking of simulation, a large part of the logic was translated to Verilog and the outputs are looking good. I mixed up some NAND/NOR gates while tracing the die which caused VRAM sequencing issues, but that's fixed now.

I also sent a NEO-B1 die to John McMaster for imaging so there's still work to be done on that second part. I might be able to get pixels with my guessed NEO-B1 logic in the meantime.

Will work on the verification board this week, screenshots to come.